The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jun. 09, 2020
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Naysen J. Robertson, Roseville, CA (US);

Robert L. Noonan, Crystal Lake, IL (US);

David F. Heinrich, Houston, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/368 (2006.01); G06F 13/16 (2006.01); G06F 9/54 (2006.01); G06F 9/46 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4031 (2013.01); G06F 9/466 (2013.01); G06F 9/4812 (2013.01); G06F 9/544 (2013.01); G06F 9/546 (2013.01); G06F 13/1668 (2013.01); G06F 13/368 (2013.01);
Abstract

A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.


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