The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jun. 16, 2020
Applicant:

Denso Corporation, Kariya, JP;

Inventors:

Akiyo Taguchi, Kariya, JP;

Masao Kimura, Kariya, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G11C 16/10 (2006.01); B60L 50/61 (2019.01); B60R 11/04 (2006.01); B60R 16/023 (2006.01); H02J 7/14 (2006.01); G01S 13/86 (2006.01); G01S 13/931 (2020.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); B60L 50/61 (2019.02); B60R 11/04 (2013.01); B60R 16/0231 (2013.01); G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01); G11C 16/10 (2013.01); H02J 7/14 (2013.01); G01S 13/865 (2013.01); G01S 13/867 (2013.01); G01S 13/931 (2013.01);
Abstract

In a data storage control device for writing data into a first memory that is non-volatile memory, an information receipt unit receives voltage-related information from a power source control device. A condition determination unit determines whether a voltage condition is satisfied. When the condition determination unit determines that the voltage condition is satisfied during execution of a writing process, a memory controller determines whether a predetermined storage condition is satisfied. When the storage condition is not satisfied, the memory controller executes a first response process of withdrawing writing residual data into the first memory but setting a validity flag as invalid. When the storage condition is satisfied, the memory controller executes a second response process of writing the residual data into the first memory.


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