The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

May. 19, 2020
Applicant:

Honeywell International Inc., Morris Plains, NJ (US);

Assignee:

Honeywell International Inc., Morris Plains, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G11C 11/4093 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0656 (2013.01); G06F 3/067 (2013.01); G06F 3/0626 (2013.01); G06F 3/0643 (2013.01); G06F 3/0661 (2013.01); G11C 11/4093 (2013.01);
Abstract

Method, apparatus and computer program product for linking data entries across data sources. For example, the apparatus includes at least one processor and at least one non-transitory memory including program code. The at least one non-transitory memory and the program code are configured to, with the at least one processor, store unlinked data entries in a staging memory area; store linked data entries in an active memory area; identifying a linked state status for the staging memory area, wherein the linked state status initially indicates a non-linked state; repeatedly performing one or more cross-data-source linking operations until the linked state status for the staging memory area indicates a linked state; and in response to determining that the linked state status for the staging memory area indicates the linked state, linking the multiple data entries by merging the staging memory area and the active memory area to generate linked data.


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