The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Dec. 10, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Rahul Vijay Kulkarni, Bengaluru, IN;

Abhijeet Gopal Godbole, Solapur, IN;

Shridhar Atmaram More, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); G01R 31/40 (2020.01); H03K 5/24 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1071 (2013.01); G01R 31/40 (2013.01); H03K 5/24 (2013.01);
Abstract

An integrated self-test mechanism for monitoring an analog-to-digital converter (ADC), a reference voltage (V) source associated with the ADC, a low-dropout regulator (LDO), or a power supply is provided. In one example, an ADC that is associated with an integrated circuit (IC) can monitor its own V, the voltage (V) of an LDO associated with the IC, or the voltage (AVDD) provided to an electrical coupling mechanism in the IC that is coupled to a power supply associated with the IC. The ADC can generate a digital output code based, at least in part, on the Vand one or more of the Vand the AVDD. The digital output code can be used to determine whether one or more of the ADC, the Vsource, the LDO, and the power supply is malfunctioning or nonoperational.


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