The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Mar. 02, 2020
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Takeshi Hioka, Machida Tokyo, JP;

Koji Kato, Yokohama Kanagawa, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); G11C 16/12 (2006.01); G11C 16/26 (2006.01); G11C 7/22 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
G11C 16/08 (2013.01); G11C 7/22 (2013.01); G11C 16/0433 (2013.01); G11C 16/12 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/34 (2013.01);
Abstract

A semiconductor storage device includes a plurality of memory cells connected to each other in series, a plurality of word lines respectively connected to gates of the plurality of memory cells, and a control circuit configured to perform a read operation by applying a first voltage higher than ground voltage to the plurality of word lines during a first time period at the beginning of which each word line is at ground voltage, applying a second voltage lower than the first voltage to a first word line during a second time period subsequent to the first time period, applying a third voltage higher than the second voltage to the first word line during a third time period subsequent to the second time period, and determining data of the memory cells connected to the first word line while all portions of the first word line are at the third voltage.


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