The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2021
Filed:
May. 03, 2019
Apple Inc., Cupertino, CA (US);
Loukas Kalenderidis, San Francisco, CA (US);
Ivan Krstic, San Francisco, CA (US);
Brian J. Dawbin, Santa Clara, CA (US);
Filip Stoklas, Prague, CZ;
Carmen A. Bovalino, III, San Francisco, CA (US);
Shyam S. Toprani, San Francisco, CA (US);
Christopher B. Zimmermann, San Jose, CA (US);
Libor Sykora, Hostivar, CZ;
Arnold S. Liu, Mountain View, CA (US);
Lucia E. Ballard, San Francisco, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
Techniques are disclosed relating to securing an accessory interface on a computing device. In various embodiments, a computing device detects a connection of an accessory device to an accessory interface port and, in response to the detected connection, evaluates a policy defining one or more criteria for restricting unauthorized access to the accessory interface port. Based on the evaluating, the computing device determines whether to disable the accessory interface port to prevent communication with the connected accessory device. In some embodiments, the computing device includes an interconnect coupled between the processor and the accessory interface port, and the interconnect includes a hub circuit configured to facilitate communication between a plurality of devices via the interconnect. In some embodiments, the computing device, in response to determining to disable the accessory interface port, instructs the hub circuit to prevent traffic from being conveyed from the accessory interface port.