The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Sep. 23, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Matthew Michael Garcia Pardini, Middlesex, MA (US);

Gregory William Alexander, Pflugerville, TX (US);

Jonathan Ting Hsieh, Poughkeepsie, NY (US);

Michael P Mullen, Poughkeepsie, NY (US);

Olaf Knute Hendrickson, Rochester, MN (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/57 (2013.01); G06F 21/85 (2013.01);
U.S. Cl.
CPC ...
G06F 21/577 (2013.01); G06F 21/85 (2013.01); G06F 2221/034 (2013.01);
Abstract

A computer-implemented method for detecting vulnerabilities in microarchitectures. A non-limiting example of the computer-implemented method includes creating a simulation for execution on a model of a microarchitecture, the simulation including a set of instructions and a placeholder for holding a piece of secret data. The computer-implemented method executes the simulation a first time on the model of the microarchitecture with a first piece of secret data stored in the placeholder and stores a first output of the first executed simulation. The computer-implemented method executes the simulation a second time on the model of the microarchitecture with a second piece of secret data stored in the placeholder and stores a second output of the second executed simulation. The computer-implemented method compares the first output with the second output and provides an indication of a microarchitecture vulnerability when there is a difference between the first output and the second output.


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