The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Jul. 09, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Tom Kolan, Haifa, IL;

Alex Lvovsky, Kiriat Motzkin, IL;

Hillel Mendelson, Kibbutz Hahotrim, IL;

Vitali Sokhin, Haifa, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 9/30 (2018.01); G06F 11/263 (2006.01); G06F 16/903 (2019.01); G06F 12/1081 (2016.01); G06F 9/38 (2018.01); G06F 9/32 (2018.01);
U.S. Cl.
CPC ...
G06F 11/3684 (2013.01); G06F 9/30043 (2013.01); G06F 9/327 (2013.01); G06F 9/3877 (2013.01); G06F 11/263 (2013.01); G06F 12/1081 (2013.01); G06F 16/903 (2019.01);
Abstract

A method for testing an integrated circuit, comprising: accessing a database associated with a test template, wherein said test template is configured to test a selected function of the integrated circuit; storing, in said database, data corresponding to at least partial predicted results of one or more random instruction sequences generated based on said test template; generating, by an automated test generation tool, a random instruction sequence based on said test template; executing said instruction sequence by a hardware exerciser, in the integrated circuit; and comparing results of said instruction sequence with said at least partial predicted results, to verify a function of said integrated circuit.


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