The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2021
Filed:
Jun. 19, 2020
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Assignee:
WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/30 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/076 (2013.01); G06F 11/1044 (2013.01); G06F 11/3037 (2013.01);
Abstract
A method and apparatus for allocation of back-end (BE) logic resources between NVM sets. When a controller detects that an NVM set is in an idle state, it deallocates the BE logic from the originally assigned NVM set and provides the BE logic resource to another NVM set. An NVM set controller matrix maps interconnections between the BE logic resource and the new NVM set to enable use of the BE logic resource and the new NVM set. When a new command arrives for the originally assigned NVM set, the BE logic resources is re-allocated to the originally assigned NVM set.