The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 2021
Filed:
May. 07, 2020
Xilinx, Inc., San Jose, CA (US);
Vidya Gopalakrishnan, San Jose, CA (US);
Anup Ganesh, Milpitas, CA (US);
Chih-Heng Tzang, Sunnyvale, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
A disclosed circuit arrangement includes a bus interface circuit and a configuration storage circuit coupled to the bus interface circuit. The bus interface circuit stores first error data in the configuration storage circuit in response to detection of an error condition. A second storage circuit provides storage of data, and an error re-logging circuit is coupled to the configuration storage circuit and to the second storage circuit. The error re-logging circuit polls the configuration storage circuit for the first error data signaling detection of an error, and in response to the first error data signaling detection of an error, stores the first error data in the second storage circuit, and clears the first error data from the configuration storage circuit to remove the signaling of the detection of the error.