The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Oct. 30, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Duho Chu, Suwon-si, KR;

Yongyoun Kim, Suwon-si, KR;

Jaesung Shim, Suwon-si, KR;

Myeongsu Oh, Suwon-si, KR;

Hojin Jung, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 1/3827 (2015.01); H01Q 1/24 (2006.01); H04M 1/02 (2006.01); G06F 1/16 (2006.01);
U.S. Cl.
CPC ...
H04B 1/3838 (2013.01); G06F 1/1616 (2013.01); G06F 1/1641 (2013.01); H01Q 1/245 (2013.01); H04M 1/0222 (2013.01); H04M 1/0247 (2013.01); H04M 2250/22 (2013.01);
Abstract

An electronic device includes a foldable housing including a hinge structure, a first housing structure including a first surface facing a first direction and a second surface facing a second direction opposite to the first direction, a second housing structure including a third surface facing a third direction and a fourth surface facing a fourth direction opposite to the third direction, and folded with respect to the first housing structure about the hinge structure, a wireless communication circuitry disposed inside the first housing structure or the second housing structure, a sensor disposed inside the first housing structure or the second housing structure, a grip sensor circuitry disposed outside the first housing structure or the second housing structure, a processor disposed inside the first housing structure or the second housing structure, and a memory operatively connected with the processor.


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