The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Jan. 25, 2021
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Kazuma Sakato, Kanagawa, JP;

Yohei Horikawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); G06F 1/08 (2006.01); G06F 7/57 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017581 (2013.01); G06F 1/08 (2013.01); G06F 7/57 (2013.01);
Abstract

The invention provides an apparatus comprising a programmable circuit including a plurality of 2-input 1-output ALUs, and an updating unit updating the programmable circuit according to circuit information, wherein each of the ALUs includes a calculation unit which performs a set type of calculation for two data and output a calculation result, a delay unit which delays the two input data in accordance with delay amounts independently set and supplies the delayed data to the calculation unit, and a controller which controls a delay amount for the delay unit and a calculation timing for the calculation unit in accordance with externally set information, wherein the updating unit sets clock gating start timings for a plurality of delay elements of the delay unit if an ALU of interest as a first processing circuit in the programmable circuit inputs final data to be processed.


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