The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Mar. 16, 2020
Applicant:

Denso Corporation, Kariya, JP;

Inventors:

Yuichi Takeuchi, Kariya, JP;

Yasuhiro Ebihara, Kariya, JP;

Masahiro Sugimoto, Toyota, JP;

Yusuke Yamashita, Nagakute, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 29/0619 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/66734 (2013.01);
Abstract

A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.


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