The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Aug. 12, 2019
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Marina Frid, Jerusalem, IL;

Igor Genshaft, Bat Yam, IL;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/10 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/064 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 12/0292 (2013.01); G06F 12/10 (2013.01);
Abstract

In one or more embodiments, a NAND-based data storage device includes a device controller configured to receive a memory write command from a host specifying a set of memory locations to be written to, and to determine whether the command is for a random write. In response to the determination, the device controller is further configured to configure one or more update entries to an update layer of a mapping architecture of the device for the set of memory locations, such that the one or more update entries are respectively aligned with a size of a pre-defined MRU of mapping data for the device. By aligning the update entries with the smaller MRU, smaller regions of memory may be flagged as obsolete, increasing efficiency. In one embodiment, the device controller further includes a RAM, and the update layer is stored in the RAM.


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