The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Sep. 21, 2020
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Dusan Stepanovic, Mountain View, CA (US);

KiYoung Nam, Los Altos, CA (US);

Mansour Keramat, San Jose, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1042 (2013.01); H03M 1/1023 (2013.01); H03M 1/1061 (2013.01);
Abstract

Systems, apparatuses, and methods for performing hybrid non-linearity correction for a digital-to-analog converter (DAC) are described. A circuit includes two correction LUTs, an edge-trim DAC, and a DAC core. A lookup of a first correction LUT is performed using a portion of the most significant bits (MSBs) of a received digital input value. A first correction value, retrieved from the first correction LUT, is applied to the digital input value to generate a corrected value. The corrected value is provided to the DAC core and to a second correction LUT. A second correction value, retrieved from the second correction LUT, is compared to the first correction value. If the second correction value is different from the first correction value, the difference is provided to the edge-trim DAC to generate an analog correction which is applied to an analog output of the DAC core.


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