The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Sep. 21, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Tamal Das, Kalyani, IN;

Ankur Ghosh, Kolkata, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018528 (2013.01); H03K 3/35613 (2013.01);
Abstract

A level shifter includes main and auxiliary level shifters, a switch circuit and a hold circuit. The main level shifter includes NMOS and PMOS transistors in a Differential to Single Ended (D2S) structure. The auxiliary level shifter is connected to an output of the main level shifter and includes NMOS and PMOS transistors. Each of the main and auxiliary level shifters includes internal nodes. The switch circuit settles first nodes of the internal nodes to values to support high speed data transmission, and the hold circuit holds second nodes of the internal nodes to a certain value during low frequency operation. The level shifter receives a serial stream of binary values of core supply voltage, converts the serial stream of binary values from the core supply voltage to an input/output (I/O) voltage, and outputs the serial stream of binary values of the input/output (I/O) voltage.


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