The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Jan. 02, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Roswald Francis, Dublin, IE;

Bruno Miguel Vaz, Alcabideche, PT;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01); H03K 17/12 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03K 17/122 (2013.01); H03K 17/6872 (2013.01); H03M 1/12 (2013.01);
Abstract

Apparatus and associated methods relate to an input buffer having a source follower connected in series with a push-pull driver to generate a shield reference node that provides conductive traces extending from the shield reference node and disposed between gate traces of the input buffer and a corresponding nearest reference potential node. In an illustrative example, the push-pull driver and the source follower may be capacitively coupled, via the gate traces, to receive an input signal from an input node. In some examples, the shield reference node may also include conductive traces disposed between the input node and/or the gate traces and a corresponding nearest reference potential node such that parts of parasitic capacitances in the input buffer may be shielded. Accordingly, the bandwidth of the input buffer may be advantageously improved. The high frequency return loss (S) may also be improved accordingly.


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