The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Mar. 16, 2020
Applicant:

Qualcomm Intelligent Solutions, Inc., San Diego, CA (US);

Inventors:

David Stewart Dunning, Portland, OR (US);

Shekhar Yeshwant Borkar, Beaverton, OR (US);

Nitin Yeshwant Borkar, Redmond, WA (US);

Matthew Scott Radecic, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 15/78 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1668 (2013.01); G06F 13/4027 (2013.01); G06F 15/7821 (2013.01);
Abstract

In-line memory module (IMM) computing nodes with an embedded processor(s) to support local processing of memory-based operations for lower latency and reduced power consumption, and related methods are disclosed. The IMM computing node that includes one or more memory chips mounted on a circuit board. The IMM computing node also includes one or more embedded processor(s) on the circuit board that are each interfaced to at least one memory chip among the one or more memory chips. The processor(s) can be configured to access its interfaced memory chip(s) through an internal memory bus on the circuit board to perform processing onboard the IMM computing node in an offload computing access mode. The embedded processors(s) can also be configured to forward memory access requests received from an external processor to the memory chip(s) for data storage and retrieval in a transparent access mode without further local processing of the memory access requests.


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