The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 2021

Filed:

Apr. 11, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Antony John Penton, Little Canfield, GB;

Simon John Craske, Cambridge, GB;

Vladimir Vasekin, Cambridge, GB;

Assignee:

ARM LIMITED, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30123 (2013.01); G06F 9/3005 (2013.01); G06F 9/30076 (2013.01); G06F 9/30189 (2013.01); G06F 9/384 (2013.01); G06F 9/3842 (2013.01); G06F 9/3863 (2013.01); G06F 9/3889 (2013.01);
Abstract

Apparatus for processing data () includes issue circuitry () for issuing program instructions (processing operations) to execute either within real time execution circuitry () or non real time execution circuitry (). Registers within a register file () are marked as non real time dependent registers if they are allocated to store a data value which is to be written by an uncompleted program instruction issued to the non real time execution circuitry and not yet completed. Issue policy control circuitry () responds to a trigger event to enter a real time issue policy mode to control the issue circuitry () to issue candidate processing operations (such as program instruction, micro-operations, architecturally triggered processing operations etc.) to one of the non real time execution circuitry or the real time execution circuitry in dependence upon whether that candidate processing operation reads a register marked as a non real time dependent register.


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