The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2021

Filed:

Aug. 18, 2020
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Min-Hyung Cho, Daejeon, KR;

Young-deuk Jeon, Sejong-si, KR;

Seong Min Kim, Sejong-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/017 (2006.01); H03K 19/08 (2006.01); H03K 19/096 (2006.01); H03K 19/17784 (2020.01);
U.S. Cl.
CPC ...
H03K 19/01742 (2013.01); H03K 19/0813 (2013.01); H03K 19/096 (2013.01); H03K 19/17784 (2013.01);
Abstract

Disclosed are a memory interface circuit including an output impedance monitor, which is capable of monitoring and calibrating an output impedance of a driving circuit in real time, and a method of calibrating the output impedance. The memory interface circuit includes a control circuit that outputs a digital transmission signal, a driving circuit that outputs an output signal, based on the digital transmission signal, an output impedance monitor that outputs a pull-up monitoring signal or a pull-down monitoring signal, based on the digital transmission signal and the output signal, and an output impedance calibrator that outputs an impedance monitoring signal, based on the pull-up monitoring signal or the pull-down monitoring signal, and wherein the driving circuit calibrates output impedance based on the impedance monitoring signal.


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