The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2021
Filed:
Nov. 22, 2019
Wenzhou University, Zhejiang, CN;
Pengjun Wang, Zhejiang, CN;
Mingbo Wang, Zhejiang, CN;
Bo Chen, Zhejiang, CN;
Gang Li, Zhejiang, CN;
Wenzhou University, Zhejiang, CN;
Abstract
A method for integrated optimization of a ternary FPRM circuit comprises: establishing an area estimation model, a power consumption estimation model and a delay estimation model of a ternary FPRM circuit under a p polarity; constructing a correlation between a multi-objective teaching-learning optimization algorithm and optimization of an area, power consumption and a delay of the ternary FPRM circuit; expressing positions of the individuals in the multi-objective teaching-learning optimization algorithm as polarities of the ternary FPRM circuit, and expressing a search space as a space for polarity selection of the ternary FPRM circuit; and finally, searching for a set of Pareto optimum polarity solution for the area, power consumption and delay of the ternary FPRM circuit by means of the multi-objective teaching-learning optimization algorithm to complete the optimization of the area, power consumption and delay for the ternary FPRM circuits.