The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2021

Filed:

Oct. 02, 2020
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Joseph Michael Pusdesris, Austin, TX (US);

Balaji Vijayan, Austin, TX (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0897 (2016.01); G06F 12/0871 (2016.01); G06F 12/14 (2006.01); G06F 12/02 (2006.01); G06F 12/0864 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0897 (2013.01); G06F 12/0246 (2013.01); G06F 12/0864 (2013.01); G06F 12/0871 (2013.01); G06F 12/1483 (2013.01);
Abstract

A technique is provided for managing caches in a cache hierarchy. An apparatus has processing circuitry for performing operations and a plurality of caches for storing data for reference by the processing circuitry when performing the operations. The plurality of caches form a cache hierarchy including a given cache at a given hierarchical level and a further cache at a higher hierarchical level. The given cache is a set associative cache having a plurality of cache ways, and the given cache and the further cache are arranged such that the further cache stores a subset of the data in the given cache. In response to an allocation event causing data for a given memory address to be stored in the further cache, the given cache issues a way indication to the further cache identifying which cache way in the given cache the data for the given memory address is stored in. In response to the allocation event, the further cache not only stores the data for the given memory address, but also retains the way indication whilst the data for the given memory address remains stored within the further cache. When the further cache subsequently issues a message to the given cache relating to the data for the given memory address, it provides the way indication to the given cache for use in controlling an access to the given cache.


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