The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Nov. 02, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Xilin Liu, San Diego, CA (US);

Parisa Mahmoudidaryan, San Diego, CA (US);

Shahin Mehdizad Taleie, San Diego, CA (US);

Negar Rashidi, Mission Viejo, CA (US);

Dongwon Seo, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/18 (2006.01); H03M 1/82 (2006.01); H03M 1/06 (2006.01); H03M 1/10 (2006.01); H03K 5/156 (2006.01); H03K 5/05 (2006.01); H03M 1/80 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/183 (2013.01); H03K 5/05 (2013.01); H03K 5/1565 (2013.01); H03M 1/0626 (2013.01); H03M 1/1009 (2013.01); H03M 1/802 (2013.01); H03M 1/825 (2013.01); H03K 2005/00202 (2013.01);
Abstract

Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. For example, certain aspects provide an apparatus for digital-to-analog conversion. The apparatus generally includes a mixing-mode digital-to-analog converter (DAC), a duty cycle adjustment circuit having an input coupled to an input clock node and having an output coupled to a clock input of the mixing-mode DAC, and a current comparison circuit having inputs coupled to outputs of the mixing-mode DAC and having an output coupled to a control input of the duty cycle adjustment circuit.


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