The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Nov. 27, 2019
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Drazen Borkovic, Los Altos, CA (US);

Ilya Minkin, Los Altos, CA (US);

Vignesh Vivekraja, Santa Clara, CA (US);

Richard John Heaton, San Jose, CA (US);

Randy Renfu Huang, Morgan Hill, CA (US);

Assignee:

Amazon Techaologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/20 (2006.01); G06F 13/10 (2006.01); G06N 3/04 (2006.01);
U.S. Cl.
CPC ...
G06F 13/20 (2013.01); G06F 13/10 (2013.01); G06N 3/04 (2013.01); G06F 2213/40 (2013.01);
Abstract

An integrated circuit device implementing a neural network accelerator may have a peripheral bus interface to interface with a host memory, and neural network models can be loaded from the host memory onto the state buffer of the neural network accelerator for execution by the array of processing elements. The neural network accelerator may also have a memory interface to interface with a local memory. The local memory may store neural network models from the host memory, and the models can be loaded from the local memory into the state buffer with reduced latency as compared to loading from the host memory. In systems with multiple accelerators, the models in the local memory can also be shared amongst different accelerators.


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