The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Mar. 21, 2018
Applicant:

Arm Limited, Cambridge, GB;

Inventor:

Wei Wang, Cambridge, GB;

Assignee:

Arm Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0891 (2016.01); G11C 11/406 (2006.01); G06F 3/06 (2006.01); G11C 11/4096 (2006.01); G11C 11/408 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0625 (2013.01); G06F 3/0673 (2013.01); G06F 12/0891 (2013.01); G06F 13/1636 (2013.01); G11C 11/408 (2013.01); G11C 11/4096 (2013.01); G11C 11/40611 (2013.01); G11C 11/40622 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/1041 (2013.01); G06F 2212/22 (2013.01); G06F 2212/608 (2013.01);
Abstract

Various implementations described herein are directed to an integrated circuit having a cache with memory components that store data with multiple addresses. The integrated circuit may include a controller that communicates with the cache to provide directives to the cache. The integrated circuit may include a refresh circuit that interprets the directives received from the controller to generate interpretation information based on determining one or more particular addresses of the multiple addresses that no longer need refreshing. The refresh circuit may further employ the interpretation information to skip the need for refreshing the one or more particular addresses pointing to the memory components in the cache that no longer need refreshing.


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