The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Jan. 29, 2019
Applicant:

Amazon Technologies, Inc., Reno, NV (US);

Inventors:

Itai Avron, Petach Tikva, IL;

Adi Habusha, Aloney Aba, IL;

Uri Leder, Lotem, IL;

Svetlana Kantorovych, Haifa, IL;

Assignee:

AMAZON TECHNOLOGIES, INC., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0806 (2016.01); G06F 12/0875 (2016.01); G06F 12/0873 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0655 (2013.01); G06F 3/061 (2013.01); G06F 3/0673 (2013.01); G06F 12/0806 (2013.01); G06F 12/0873 (2013.01); G06F 12/0875 (2013.01); G06F 2212/60 (2013.01);
Abstract

A dedicated input/output (I/O) cache can be used for I/O-to-processor communications. Data received from an I/O device can be written to the I/O cache and also written to a device memory that is accessible to the processor. The processor can then access the data in the fast, dedicated I/O cache if available. Otherwise, the processor can read the data from the memory into a conventional processor cache for processing. Writes to the cache can be full or partial, with partial writes utilizing padding in some embodiments. The data can be written sequentially in a circular manner. Data processed by the processor can be invalidated, and invalidated data can be overwritten on a subsequent write. Phase bits can also be used to indicate the pass during which various writes were performed.


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