The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2021
Filed:
Aug. 09, 2018
Applicant:
Planar Systems, Inc., Beaverton, OR (US);
Inventor:
Shahnad Nadershahi, Beaverton, OR (US);
Assignee:
PLANAR SYSTEMS, INC., Beaverton, OR (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); G06F 1/04 (2006.01); H03K 3/027 (2006.01); H03K 3/84 (2006.01); H05B 45/325 (2020.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); G06F 1/04 (2013.01); H03K 3/027 (2013.01); H03K 3/84 (2013.01); H05B 45/325 (2020.01);
Abstract
A clock synthesis circuit and method provides for precision controlling and programming a selected number of clock pulses (or simply 'clocks') fitted within time periods between two consecutive pulses of a so-called system heartbeat (SHB) timing signal. The disclosed embodiments have applicability in light emitting diode (LED) display driver integrated circuits (ICs) and, more generally, digital circuits including computer processors, microcontrollers, logic devices such as field-programmable gate arrays (FP-GA), and other logic circuitry.