The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2021
Filed:
Jan. 29, 2020
Applicant:
David Liu, Fremont, CA (US);
Inventor:
David Liu, Fremont, CA (US);
Assignee:
JONKER LLC, Zephyr Cove, NV (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/423 (2006.01); H01L 27/11558 (2017.01); H01L 27/11519 (2017.01); H01L 27/11517 (2017.01); H01L 27/11541 (2017.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 27/11521 (2017.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7885 (2013.01); H01L 27/11517 (2013.01); H01L 27/11519 (2013.01); H01L 27/11521 (2013.01); H01L 27/11541 (2013.01); H01L 27/11558 (2013.01); H01L 29/1095 (2013.01); H01L 29/42324 (2013.01); H01L 29/66825 (2013.01); H01L 29/7816 (2013.01); H01L 29/7883 (2013.01);
Abstract
An integrated circuit includes two different types of embedded memories, with cells that have different retention characteristics, and situated in different areas of the substrate. In some applications the cells are both non-volatile memories sharing a common gate layer but with different oxide layers, different thicknesses, etc. The first type of cell is a conventional flash cell which can be part of a logic/memory region, while the second type of cell uses capacitive coupling and can be located in a high voltage region. Because of their common features, the need for additional masks, manufacturing steps, etc. can be mitigated.