The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

Feb. 27, 2020
Applicant:

Regents of the University of Minnesota, Minneapolis, MN (US);

Inventors:

Jian-Ping Wang, Minneapolis, MN (US);

Sachin S. Sapatnekar, Minneapolis, MN (US);

Ulya R. Karpuzcu, Minneapolis, MN (US);

Zhengyang Zhao, Minneapolis, MN (US);

Masoud Zabihi, Minneapolis, MN (US);

Michael Salonik Resch, Minneapolis, MN (US);

Zamshed I. Chowdhury, Minneapolis, MN (US);

Thomas Peterson, Minneapolis, MN (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/161 (2013.01); G11C 11/1659 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 11/1697 (2013.01);
Abstract

A logic-memory cell includes a spin-orbit torque device having first, second and third terminals configured such that current between the second and third terminals is capable of changing a resistance between the first and second terminals. In the cell, a first transistor is connected between a logic connection line and the first terminal of the spin-orbit torque device and a second transistor is connected between the logic connection line and the third terminal of the spin-orbit torque device.


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