The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 2021
Filed:
Jul. 22, 2019
Applicant:
Everspin Technologies, Inc., Chandler, AZ (US);
Inventors:
Syed M. Alam, Austin, TX (US);
Thomas S. Andre, Austin, TX (US);
Assignee:
Everspin Technologies Inc., Chandler, AZ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/12 (2006.01); G11C 7/06 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 5/063 (2013.01); G11C 7/062 (2013.01);
Abstract
In some examples, a memory device may have at least a first and a second memory array. In some cases, a portion of the bit cells of the first memory array may be coupled to first PMOS-follower circuitry and to second PMOS-follower circuitry. A portions of the bit cells of the second memory array may also be coupled to the second PMOS-follower circuitry and to third PMOS-follower circuitry. Additionally, in some cases, the portion of bit cells of both the first memory array and the second memory array may be coupled to shared preamplifier circuitry.