The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

Nov. 09, 2015
Applicant:

Otis Elevator Company, Farmington, CT (US);

Inventor:

Gérard Sirigu, Gien, FR;

Assignee:

OTIS ELEVATOR COMPANY, Farmington, CT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05B 9/02 (2006.01); B66B 5/00 (2006.01); G01R 31/14 (2006.01);
U.S. Cl.
CPC ...
G05B 9/02 (2013.01); B66B 5/0087 (2013.01); G01R 31/14 (2013.01); G05B 2219/21039 (2013.01); G05B 2219/24008 (2013.01); G05B 2219/24054 (2013.01); G05B 2219/2659 (2013.01);
Abstract

A self-diagnostic circuit includes an electrical conductor configured to multiplex, a first switch interposing the electrical conductor, and a first module crossing the first switch. The first module includes a first receptor antenna associated with the conductor on one side of the first switch, a first emitter antenna associated with the conductor on an opposite side of the first switch, and a first interfacing microprocessor. The first interfacing microprocessor is configured to receive no signal from the first receptor antenna when the first switch is open thus generating a first open signal and a first address signal indicative of the first module and outputting the first open signal and the first address signal to the conductor via the first emitter antenna. The first interfacing microprocessor is further configured to receive a first induced frequency signal from the first receptor antenna when the first switch is closed thus generating a first closed signal and the first address signal indicative of the first module and outputting the first closed signal and the first address signal to the conductor via the first emitter antenna.


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