The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

Jun. 09, 2017
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Hideki Sato, Sakai, JP;

Yoshiki Ikuta, Sakai, JP;

Takayuki Shimizu, Sakai, JP;

Takuma Hiramatsu, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01S 7/4865 (2020.01); G01S 17/10 (2020.01); G01J 1/44 (2006.01); G01J 1/42 (2006.01); G01C 3/06 (2006.01); G01S 7/486 (2020.01);
U.S. Cl.
CPC ...
G01S 7/4865 (2013.01); G01C 3/06 (2013.01); G01J 1/42 (2013.01); G01J 1/44 (2013.01); G01S 7/486 (2013.01); G01S 17/10 (2013.01); G01J 2001/442 (2013.01);
Abstract

An optical sensor configured to reduce a measurement time while the accuracy of the optical sensor is maintained is realized. An initial configuration circuit () includes a counter configured to perform counting of the number of pulse outputs from a first light-receiving unit () in first to nth regions obtained by dividing each cycle of a reference clock into n equal parts, determines, among the first to nth regions, a region in which a counter value is largest, and the initial configuration circuit causes a first DLL circuit () to perform a converging operation to the region determined.


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