The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 2021

Filed:

Dec. 26, 2017
Applicant:

Sanyo Electric Co., Ltd., Daito, JP;

Inventors:

Masato Nishikawa, Hyogo, JP;

Masayuki Yoshinaga, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B60L 58/14 (2019.01); G01R 31/382 (2019.01); B60L 58/10 (2019.01); B60L 3/00 (2019.01); H01M 10/42 (2006.01); H02J 7/00 (2006.01); B60L 58/15 (2019.01);
U.S. Cl.
CPC ...
B60L 58/14 (2019.02); B60L 3/0046 (2013.01); B60L 58/10 (2019.02); B60L 58/15 (2019.02); G01R 31/382 (2019.01); H01M 10/4257 (2013.01); H02J 7/007 (2013.01); H02J 7/0021 (2013.01); H02J 7/00302 (2020.01);
Abstract

A status signal output circuit outputs a first status signal indicating with a binary level whether or not power the storage unit is normal in accordance with a determination result of the status determination circuit, and, as a second status signal, a pulse width modulation (PWM) signal according to the status of the power storage unit when a measurement circuit including the status determination circuit is normal, or a signal having a axed level when the measurement circuit including the status determination circuit is abnormal. A control signal output circuit outputs, to a drive circuit, a control signal for control to bring a switch inserted between the power storage unit and a load into an OFF state when the power storage unit has abnormality, in accordance with the first status signal and the second status signal output from the status signal output circuit.


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