The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2021
Filed:
Mar. 20, 2020
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
Roberto Brioschi, Austin, TX (US);
Rkia Achehboune, Edinburgh, GB;
Assignee:
Cirrus Logic, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04R 19/00 (2006.01); H04R 19/04 (2006.01); B81B 7/00 (2006.01); H04R 31/00 (2006.01);
U.S. Cl.
CPC ...
H04R 19/04 (2013.01); B81B 7/0032 (2013.01); H04R 19/005 (2013.01); H04R 31/006 (2013.01); B81B 2201/0257 (2013.01); H04R 2201/003 (2013.01); H04R 2201/02 (2013.01);
Abstract
The application describes a package substrate for a MEMS transducer package having a recessed region formed in an upper surface of the package substrate. The recessed region extends only partially through the package substrate from an opening in the upper surface of the package substrate in a first direction towards the lower surface of the substrate. The recessed region extends only partially through the package substrate from an opening in a side surface of the package substrate in a second direction towards an opposite side surface.