The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Feb. 25, 2020
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Xiaofang Chen, Milpitas, CA (US);

Wenwei Wang, San Jose, CA (US);

Danyang Qiao, Santa Clara, CA (US);

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 3/35613 (2013.01); H03K 3/356182 (2013.01); H03K 19/018521 (2013.01);
Abstract

Circuits integrating OR logic and level shifting functionality and methods of operating the same are configured to accommodate different applications. One such circuit comprises first and second transistors coupled in parallel defining first and second nodes, the first transistor being responsive to a first input signal and the second transistor being responsive to a second input signal; a first resistor coupled between a power supply terminal of the circuit and the first node; and a second resistor coupled between the second node and a ground terminal of the circuit. The circuit generates an output signal having a voltage level that is lower than a voltage level of each of the first and second input signals.


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