The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Jul. 24, 2018
Applicant:

Ams Sensors Singapore Pte. Ltd, Singapore, SG;

Inventors:

Robert Lenart, Singapore, SG;

Sonja Gantner-Hanselmann, Lachen, CH;

Özkan Ahishali, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0203 (2014.01); B29C 45/14 (2006.01); H01L 31/18 (2006.01); H01L 21/56 (2006.01); B29K 63/00 (2006.01); B29L 31/34 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0203 (2013.01); B29C 45/14655 (2013.01); H01L 21/565 (2013.01); H01L 21/566 (2013.01); H01L 31/1876 (2013.01); H01L 31/1892 (2013.01); B29K 2063/00 (2013.01); B29L 2031/3406 (2013.01); H01L 2933/005 (2013.01); H01L 2933/0025 (2013.01);
Abstract

Wafer-level methods for manufacturing one or more uniform layers of material on one or more surfaces of a plurality of optoelectronic modules include assembling a wafer assembly, injecting a formable material into the wafer assembly, ejecting excess formable material form the wafer assembly, and hardening one or more formable material layers on one or more surfaces of the plurality of optoelectronic modules such that the hardened one or more formable material layers are the one or more uniform layers of material.


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