The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2021
Filed:
Apr. 20, 2018
Applicant:
Skyworks Solutions, Inc., Irvine, CA (US);
Inventors:
Bharatjeet Singh Gill, Ottawa, CA;
Grant Darcy Poulin, Carp, CA;
Assignee:
SKYWORKS SOLUTIONS, INC., Irvine, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 23/48 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/49 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/481 (2013.01); H01L 24/09 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/85 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/056 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05568 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/4809 (2013.01); H01L 2224/4813 (2013.01); H01L 2224/48149 (2013.01); H01L 2224/4912 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73257 (2013.01);
Abstract
A flip-chip integrated circuit die includes a front side including active circuitry formed therein and a plurality of bond pads in electrical communication with the active circuitry, at least two through-wafer vias extending at least partially though the die and having portions at a rear side of the die, and a bond wire external to the die and electrically coupling the portions of the at least two through-wafer vias at the rear side of the die.