The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Aug. 13, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Lawrence A. Clevenger, LaGrangeville, NY (US);

Baozhen Li, South Burlington, VT (US);

Kirk D. Peterson, Jericho, VT (US);

John E. Sheets, II, Zumbrota, MN (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/306 (2006.01); H01L 21/324 (2006.01); H01L 23/532 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); H01L 21/30625 (2013.01); H01L 21/324 (2013.01); H01L 21/7684 (2013.01); H01L 21/76847 (2013.01); H01L 21/76882 (2013.01); H01L 21/76898 (2013.01); H01L 22/20 (2013.01); H01L 23/53228 (2013.01); H01L 23/53238 (2013.01);
Abstract

Embodiments are directed to a method for repairing features of a host semiconductor wafer. The method includes forming a feature of the host semiconductor wafer, wherein the feature includes a first conductive material and a surface having a planar region and non-planar regions. The method further includes forming a metal conductive liner over the non-planar regions. The method further includes applying a second conductive material metal layer over said the conductive liner. The method further includes recessing the second conductive material to be substantially planar with the planar region.


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