The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Sep. 16, 2020
Applicant:

Hyperblox Inc., Nashua, NH (US);

Inventors:

Arun C. Alex, Nashua, NH (US);

Sudhir Kunnath, Nashua, NH (US);

Assignee:

Hyperblox Inc., Nashua, NH (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01); G06F 8/71 (2018.01); H04L 29/08 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06F 8/457 (2013.01); G06F 8/433 (2013.01); G06F 8/71 (2013.01); G06F 9/4843 (2013.01); H04L 67/10 (2013.01); G06F 2209/5011 (2013.01); G06F 2209/5018 (2013.01);
Abstract

An example embodiment may involve obtaining one or more blueprint files. The blueprint files may collectively define a system of processing nodes, a call flow involving a sequence of messages exchanged by the processing nodes, and message formats of the messages exchanged by the processing nodes. The example embodiment may also involve compiling the blueprint files into machine executable code. The machine executable code may be capable of: representing the processing nodes as decomposed, dynamically invoked units of logic, and transmitting the sequence of messages between the units of logic in accordance with the message formats. The units of logic may include a respective controller and one or more respective workers for each type of processing node.


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