The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 2021

Filed:

Jul. 26, 2019
Applicant:

Graphcore Limited, Bristol, GB;

Inventors:

Stephen Felix, Bristol, GB;

Mrudula Gore, Bath, GB;

Alan Graham Alexander, Wotton-under-Edge, GB;

Assignee:

GRAPHCORE LIMITED, Bristol, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/499 (2006.01); G06F 7/483 (2006.01); G06F 5/01 (2006.01); G06N 3/06 (2006.01); G06F 9/30 (2018.01); H03M 7/24 (2006.01); H03M 7/02 (2006.01);
U.S. Cl.
CPC ...
G06F 7/49915 (2013.01); G06F 5/012 (2013.01); G06F 7/483 (2013.01); G06F 9/30014 (2013.01); G06F 9/30025 (2013.01); G06N 3/06 (2013.01); H03M 7/02 (2013.01); H03M 7/24 (2013.01);
Abstract

A hardware module comprising at least one of: one or more field programmable gate arrays and one or more application specific integrated circuits configured to: receive a number in floating-point representation at a first precision level, the number comprising an exponent and a first mantissa; apply a first random number to the first mantissa to generate a first carry; truncate the first mantissa to a level specified by a second precision level; add the first carry to the least significant bit of the mantissa truncated to the level specified by the second precision level to form a mantissa for the number in floating-point representation at the second precision level.


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