The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2021

Filed:

Mar. 18, 2020
Applicant:

Wistron Neweb Corp., Hsinchu, TW;

Inventors:

Chen-An Hsieh, Hsinchu, TW;

Jui-Hua Hu, Hsinchu, TW;

Shih-Wei Chang, Hsinchu, TW;

Assignee:

WISTRON NEWEB CORP., Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/00 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H01R 12/58 (2011.01);
U.S. Cl.
CPC ...
H05K 1/11 (2013.01); H01R 12/58 (2013.01); H05K 1/181 (2013.01); H05K 2201/10325 (2013.01);
Abstract

A system package module is provided. The system package module includes a module substrate, a plurality of first pins and a plurality of second pins. The module substrate includes a module substrate surface. The module substrate surface includes a first pin arrangement area and a second pin arrangement area. The second pin arrangement area surrounds the first pin arrangement area. The first pins are disposed in the first pin arrangement area. A first pin gap is formed between the two adjacent first pins. The second pins are disposed in the second pin arrangement area. A second pin gap is formed between the two adjacent second pins. The first pin gap is greater than the second pin gap.


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