The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 2021

Filed:

Jun. 20, 2019
Applicant:

Murata Manufacturing Co., Ltd., Nagaokakyo, JP;

Inventors:

Hirokazu Yazaki, Nagaokakyo, JP;

Takanori Tsuchiya, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/44 (2007.01); H01F 27/40 (2006.01); H01G 4/40 (2006.01); H02M 3/155 (2006.01); H02M 3/04 (2006.01); H01L 23/64 (2006.01); H01G 4/38 (2006.01); H01F 17/00 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H02M 1/44 (2013.01); H01F 27/40 (2013.01); H01G 4/40 (2013.01); H02M 3/155 (2013.01); H01F 17/0013 (2013.01); H01G 4/38 (2013.01); H01L 23/645 (2013.01); H01L 23/647 (2013.01); H01L 23/66 (2013.01); H02M 3/04 (2013.01);
Abstract

A noise reduction circuit is connected between at least one line of an input line and an output line of a DC-DC converter, a ground, and a ground terminal of a switching control IC included in the DC-DC converter. The noise reduction circuit includes a first capacitor connected between the at least one line and the ground terminal, a second capacitor connected between the at least one line and the ground, and an inductor connected between the ground terminal and the ground.


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