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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11164797 B1

PDFFull Text
Date of Patent:
Nov. 02, 2021

Filed:

Dec. 10, 2018

Method of manufacturing semiconductor integrated circuit

Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventor:

Yoshiaki Toyoda, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:
Primary Examiner:

Michael M Trinh

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 27/06 (2006.01); H01L 21/8238 (2006.01); H01L 21/324 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/308 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/739 (2006.01); H01L 29/745 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823878 (2013.01); H01L 21/266 (2013.01); H01L 21/2652 (2013.01); H01L 21/3086 (2013.01); H01L 21/324 (2013.01); H01L 21/823892 (2013.01); H01L 27/0623 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/1095 (2013.01); H01L 29/41741 (2013.01); H01L 29/42368 (2013.01); H01L 29/42376 (2013.01); H01L 29/66348 (2013.01); H01L 29/66734 (2013.01); H01L 29/7813 (2013.01); H01L 29/66363 (2013.01); H01L 29/7397 (2013.01); H01L 29/7455 (2013.01);
Abstract

A method of manufacturing a semiconductor integrated circuit, includes: forming a first well region having a second conductivity type in an upper portion of a support layer having a first conductivity type; forming an oxide film on the first well region by a thermal oxidation method to decrease a concentration of impurities at an top surface of top surface side of the first well region; removing the oxide film; forming a second well region having the first conductivity type in an upper portion of the first well region; and merging a semiconductor element having a main electrode region having the second conductivity type in the second well region.

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