The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2021

Filed:

Jun. 14, 2017
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Christian Fleischhacker, Villach, AT;

Rainer Strobel, Munich, DE;

Assignee:

MaxLinear, Inc., Carlsbad, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 1/44 (2006.01); H04L 25/02 (2006.01); H03H 11/28 (2006.01); H04B 3/32 (2006.01); H04L 5/14 (2006.01);
U.S. Cl.
CPC ...
H04B 1/44 (2013.01); H03H 11/28 (2013.01); H04B 3/32 (2013.01); H04L 5/14 (2013.01); H04L 25/0272 (2013.01); H04L 25/0278 (2013.01);
Abstract

A line driver circuit has first and second differential input terminals and first and second differential output terminals, and is configured to interface with first and second termination impedances coupled between the first and second differential output terminals, respectively, and first and second transmit chain output terminals, respectively. The line driver circuit includes an amplifier circuit having first and second input terminals coupled to the first and second differential input terminals of the line driver circuit, respectively, and first and second output terminals coupled to the first and second differential output terminals of the line driver circuit, respectively, and an impedance switching circuit coupled between the first and second output terminals of the amplifier circuit. The impedance switching circuit switches between a first switching mode and a second switching mode, wherein in the first switching mode a first switching configuration is established resulting in a first output impedance.


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