The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2021

Filed:

Jan. 10, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Jochen O. Schrattenecker, Reichenthal, AT;

Niels Christoffers, Vienna, AT;

Vincenzo Fiore, Linz, AT;

Bernhard Gstoettenbauer, Engerwitzdorf, AT;

Helmut Kollmann, Linz, AT;

Alexander Melzer, Neutillmitsch, AT;

Alexander Onic, Linz, AT;

Rainer Stuhlberger, Puchenau, AT;

Mathias Zinnoecker, Linz, AT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01Q 3/36 (2006.01); G01S 7/35 (2006.01); G01S 7/40 (2006.01); H03L 7/06 (2006.01); G01S 13/02 (2006.01); G01S 13/34 (2006.01); G01S 7/03 (2006.01); G01S 13/88 (2006.01); G01S 13/931 (2020.01); H04B 1/16 (2006.01); H04B 1/10 (2006.01); G01R 25/04 (2006.01);
U.S. Cl.
CPC ...
H01Q 3/36 (2013.01); G01S 7/032 (2013.01); G01S 7/35 (2013.01); G01S 7/4008 (2013.01); G01S 7/4017 (2013.01); G01S 7/4026 (2013.01); G01S 13/02 (2013.01); G01S 13/343 (2013.01); G01S 13/88 (2013.01); H03L 7/06 (2013.01); G01R 25/04 (2013.01); G01S 7/4069 (2021.05); G01S 13/931 (2013.01); G01S 2013/0254 (2013.01); H04B 1/10 (2013.01); H04B 1/109 (2013.01); H04B 1/1081 (2013.01); H04B 1/1638 (2013.01);
Abstract

A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.


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