The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2021

Filed:

Dec. 19, 2016
Applicant:

Stichting Energieonderzoek Centrum Nederland, Petten, NL;

Inventors:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0725 (2012.01); H01L 31/078 (2012.01); H01L 51/42 (2006.01); H01L 51/44 (2006.01); H01L 31/0224 (2006.01); H01L 27/30 (2006.01); H01L 31/0236 (2006.01); H01L 31/18 (2006.01); H01L 31/043 (2014.01);
U.S. Cl.
CPC ...
H01L 31/0725 (2013.01); H01L 27/302 (2013.01); H01L 31/02245 (2013.01); H01L 31/02366 (2013.01); H01L 31/022425 (2013.01); H01L 31/022441 (2013.01); H01L 31/022466 (2013.01); H01L 31/043 (2014.12); H01L 31/078 (2013.01); H01L 31/1868 (2013.01); H01L 31/1884 (2013.01); H01L 51/4213 (2013.01); H01L 51/445 (2013.01); Y02E 10/549 (2013.01); Y02P 70/50 (2015.11);
Abstract

A tandem solar cell includes a top solar cell and a bottom solar cell. The top solar cell and the bottom solar cell each have a respective front surface and a rear surface, with the respective front surfaces being adapted for facing a radiation source during use. The top solar cell is arranged with its rear surface overlying the front surface of the bottom solar cell. The top solar cell includes a photovoltaic absorber layer with a bandgap greater than that of crystalline silicon. The bottom solar cell includes a crystalline silicon substrate. On at least a portion of the front surface of the bottom solar cell a passivating layer stack is disposed which includes a thin dielectric film and a secondary layer of either selective carrier extracting material or polysilicon. The thin dielectric film is arranged between the silicon substrate and the secondary layer.


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