The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2021

Filed:

Jan. 22, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Won Ho Choi, San Jose, CA (US);

Jongyeon Kim, Milpitas, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/02 (2006.01); G11C 7/10 (2006.01); H01L 43/06 (2006.01); H01L 43/10 (2006.01); H01L 27/22 (2006.01);
U.S. Cl.
CPC ...
G11C 15/02 (2013.01); G11C 7/1096 (2013.01); H01L 27/226 (2013.01); H01L 43/065 (2013.01); H01L 43/10 (2013.01);
Abstract

Ternary content addressable memory (TCAM) circuits are provided herein. In one example implementation, a TCAM circuit can include a first spin-orbit torque (SOT) magnetic tunnel junction (MTJ) element having a pinned layer coupled to a first read transistor controlled by a first search line, and having a spin hall effect (SHE) layer coupled in a first configuration across complemented write inputs. The TCAM circuit can include a second SOT MTJ element having a pinned layer coupled to a second read transistor controlled by a second search line, and having a SHE layer coupled in a second configuration across the complemented write inputs. The TCAM circuit can include a bias transistor configured to provide a bias voltage to drain terminals of the first read transistor and the second read transistor, and a voltage keeper element that couples the drain terminals to a match indicator line.


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