The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2021
Filed:
Jul. 08, 2020
Siliconch Systems Pvt Ltd, Karnataka, IN;
Rakesh Kumar Polasa, Karnataka, IN;
Shubham Paliwal, Uttar Pradesh, IN;
Kaustubh Kumar, Uttar Pradesh, IN;
SILICONCH SYSTEMS PVT LTD, Karnataka, IN;
Abstract
Systems involve a dividing unit configured to divide functionality in digital hardware portion through finite state machines (FSMs), protocol timers and PD message accelerator blocks for reducing code size such that their implementation combined with a low code-size firmware (FW) interacts, using a control unit operatively coupled to the dividing unit, with the hardware portion to provide updates in an USB-PD specification, wherein at least one of the FSMs configured to run at a predefined UI clock frequency to enable low active power to the system, a wake-up unit running at least on 4 times of UI clock frequency and detects data edge on configuration channel line to wake-up the entire system from sleep state, wherein a plurality of standard power saving mechanisms selected from clock gating and frequency reduction for clocks are implemented to enable low power corresponding to the system and bypass paths at each level of implementation.