The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2021

Filed:

May. 07, 2020
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Germano Nicollini, Piacenza, IT;

Stefano Polesel, Treviso, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/26 (2006.01); G05F 1/59 (2006.01);
U.S. Cl.
CPC ...
G05F 1/59 (2013.01); G05F 3/262 (2013.01); G05F 3/26 (2013.01);
Abstract

A current mirror includes first and second transistors having current paths coupled to an input current line. The current paths for the first and second transistors are referenced to ground via respective first and second resistors having resistance values twice a first resistance value. The first transistor is diode connected. A third transistor has a current path coupled to an output current line and referenced to ground via a third resistor having a second resistance value equal to the first resistance value divided by a mirror factor. Control terminals of the first and third transistors are coupled together, and further coupled to a control terminal of the second transistor through a coupling resistor. A first capacitor is coupled between ground and the control terminal of the second transistor unit. A second capacitor is coupled between ground and the current path through the third transistor.


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