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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11145742 B1

PDFFull Text
Date of Patent:
Oct. 12, 2021

Filed:

Nov. 20, 2018

Process of forming nitride semiconductor device

Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventor:

Tomohiro Yoshida, Osaka, JP;

Assignee:

SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka, JP;

Attorney:

Smith, Gambrell & Russell, LLP.

Primary Examiner:

Abul Kalam

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/308 (2006.01); H01L 29/205 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 21/306 (2006.01); H01L 29/08 (2006.01); H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 29/45 (2006.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66462 (2013.01); H01L 21/0217 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/02576 (2013.01); H01L 21/0331 (2013.01); H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/30621 (2013.01); H01L 29/0891 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/42316 (2013.01); H01L 21/0274 (2013.01); H01L 21/02458 (2013.01); H01L 21/31116 (2013.01); H01L 29/452 (2013.01);
Abstract

A process of forming a nitride semiconductor device is disclosed. The process includes steps of: (a) forming insulating films on a semiconductor stack, where the insulating films include a first silicon nitride (SiN) film, a silicon oxide (SiO) film, and a second SiN film; (b) forming an opening in the insulating films; (c) widening the opening in the SiOfilm; (d) forming a recess in the semiconductor stack using the insulating films as a mask; (e) growing a doped region within the recess and simultaneously depositing the nitride semiconductor material constituting the doped region on the second SiN film; and (f) removing the nitride semiconductor material deposited on the second SiN film and the second SiN film by removing the SiOfilm.

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